This invention is related to electronic image sensor circuits built using metal oxide semiconductor (MOS) fabrication processes.
Image sensor circuits are used in a variety of different types of digital image capture systems, including products such as scanners, copiers, and digital cameras. The image sensor is typically composed of an array of light-sensitive pixels that are electrically responsive to incident light reflected from an object or scene whose image is to be captured.
FIG. 1 illustrates a prior art pixel 100 with electronic shutter that may be built using MOS fabrication processes. The pixel 100 includes a photodiode PD10 coupled to a RESET field effect transistor (FET) M10 with an electronic shutter mechanism provided by a SAMPLE transistor M11 and a storage capacitor C1. In operation, the pixel 100 is reset by applying a RESET signal which causes the RESET transistor to provide a low impedance path and thus reverse bias PD10. Next, a SAMPLE signal is applied to create a low impedance path between nodes A and B, thereby charging C1 to a reset level that is typically close to the rail or supply voltage VDD.
When the object or scene comes into view of the sensor circuit and the incident light is allowed to shine on PD10, node A is isolated from VDD by deasserting the RESET signal, and the voltage at nodes A and B begins to decay. The rate of decay is determined by the photocurrent IPHOTO in PD10 (caused by light-generated electron-hole pairs), by any leakage current through PD10, by the capacitance of C1, by the parasitic capacitance of CD1, and by any parasitic leakage paths to the nodes A and B (not shown).
After a predetermined interval, known as the exposure or integration time, has elapsed from the moment node A was isolated, node B is also isolated by deasserting SAMPLE, thereby capturing a light-generated xe2x80x9cexposedxe2x80x9d value at node B. The capacitance of C1 is selected so that the exposed value may be held at node B until a related signal is read at the OUTPUT node.
To read the OUTPUT node, an ADDRESS signal is applied to the transistor M13 which acts as a switch to cause a signal related to the exposed value to appear at the OUTPUT node. The difference between the exposed value and a xe2x80x9cresetxe2x80x9d value (representing the reset voltage at node B) gives a measure of the amount of light intensity that was incident on the pixel 100 during the exposure time. A similar but more complex read-out circuit having intra-pixel charge transfer is discussed in U.S. Pat. No. 5,471,515 to Fossum et al.
The performance of an image capture system depends in large part on the sensitivity of each individual pixel in the sensor array and its immunity from noise. Noise here is defined as small fluctuations in a signal that can be caused by a variety of known sources. Such sources include, for instance, undesirable leakage currents and manufacturing variations between pixels. An image sensor with increased noise immunity yields sharper, more accurate images in the presence of noise.
Improving the sensitivity of each pixel permits a reduction in exposure time which in turn allows the capture of images at a greater rate. This allows the image capture system to capture motion in the scene. In addition to allowing greater frame rate, higher pixel sensitivity also helps detect weaker incident light to capture acceptable quality images under low light conditions.
Pixel sensitivity is defined here as being related to the ratio of a change in the pixel output voltage (e.g., at the OUTPUT node of pixel 100) to the photogenerated charge in the pixel. For the prior art pixel 100 in FIG. 1, the sensitivity also depends in large part on the total capacitance of node B. The capacitance at node B includes the sum capacitance of CD1 and C1 where CD1 is the photodiode diffusion parasitic capacitance. Reducing the sum capacitance increases sensitivity, because the change in the voltage at node B is increased when the capacitance is smaller for the same photogenerated charge. Reducing the capacitance, however, lowers noise immunity in that the voltage at node B is more susceptible to leakage currents.
Another way to increase pixel sensitivity is to increase the efficiency of the photodiode by changing the photodiode responsitivity characteristics. Doing so, however, can require deviating from a standard MOS integrated circuit fabrication process, thereby further increasing the cost of manufacturing the image sensor circuit.
It is therefore desirable to have a pixel design with improved sensitivity and noise performance using electrical circuitry available with standard MOS fabrication processes.
This invention in one embodiment is directed at a pixel having photodetecting, amplifying, and storage circuitry. The photodetecting circuitry provides a first signal in response to incident light. The amplifying circuitry receives a control signal and provides an output current in response to the first signal and the control signal, the output current being received by the storage circuitry.
In another embodiment of the invention, the pixel is part of an image sensor of an imaging system. The system includes an optical system for being exposed to incident light, an image sensor coupled to the optical system to receive the incident light, where each pixel in the sensor has photodetecting circuitry providing an original signal representative of the incident light, amplifying circuitry having a signal input, a control input, and an output, the amplifying circuitry providing an output current in response to receiving the original signal at the signal input and a first control signal at the control input, and storage circuitry coupled to the output for receiving the output current and in response providing an exposed voltage representative of the incident light. The system also includes analog-to-digital conversion circuitry coupled to the sensor for converting analog signals related to the exposed voltage in each pixel into digital signals representing raw image data, digital signal and image processing generating captured image data in response to receiving the digital signals, and an output interface for transferring the captured image data to an image processing system separate from the imaging system.